The toolbox includes reference applications for wireless standards and IP blocks.

You can modify the reference applications for integration into your own design. HDL implementations of the toolbox algorithms are optimized for efficient resource usage and performance for prototyping or for production deployment on FPGA, ASIC, and SoC devices.

The toolbox algorithms generate readable, synthesizable code in VHDL® and Verilog® (with HDL Coder). You can verify the generated HDL code on FPGA hardware from Simulink using FPGA in the loop cosimulation. Also, you can generate SystemVerilog DPI components to verify wireless applications in an HDL environment (with HDL Verifier). For over-the-air testing, you can connect transmitter and receiver models to radio devices (with Communications Toolbox and SoC Blockset hardware support packages).