It provides a design framework that supports a diverse set of interface types, frame sizes, and frame rates. The image processing, video, and computer vision algorithms in the toolbox use an architecture appropriate for HDL implementations.

The toolbox algorithms are designed to generate readable, synthesizable code in VHDL® and Verilog® (with HDL Coder). The generated HDL code is FPGA-proven for frame sizes up to 8k resolution and for high frame rate (HFR) video. Toolbox capabilities are available as MATLAB functions, System objects, and Simulink blocks.